FPGA frequency counter code.

An FPGA project that does something useful: implements a frequency counter using the Xilinx Spartan 3AN development board. Basically consists of two counters and the AX8 uC core. The first counter generates a 1 Hz timing signal from the on-board 50 MHz crystal oscillator, and the second counter counts the signal under test. The AX8 core runs a simple program that reads the count value and formats it for display on the LCD.
The attached image is counting the frequency of a VEX RC transmitter using a 75.97 MHz crystal. The measured count is 75.971459 MHz, which is within 0.002% of the expected value. The development board uses an xtal oscillator marked AGXO-751L 50.000 A. I found a datasheet at www.inysa.es indicating that A versions are 100ppm, or 0.01%, so the measured value is well inside the tolerances.
I'll be posting the code when I get it ready.

AX8 core, UART, and uC programming

Progress! I got the AX8 core (a uC based on the Atmel AVR instruction set, available from opencores.org) running on the Xilinx Spartan-3an eval board. It writes to the UART core, and I can see the UART's output on my PC.
Since it takes 7 minutes or more to recompile an FPGA design, I decided to set up data2mem. That's a Xilinx-supplied tool to update just the contents of internal RAM blocks without doing a full recompile. It took quite a bit of searching, but I figured out how to do it, and it works fast.
Details are online at
> www.sensicomm.com/main/projects/fpga/AX8_on_Xilinx.shtml