Wednesday, November 23, 2011

Desampling using a Cascaded Integrator Comb filter

Been working with a BeagleBoard for the last few months. Can't say much about the project but the Beagle is a nice ARM Linux platform. Finishing up, so now I have more time to update the MHZ100Q sourceforge project page.
I've now added a page describing the ideas behind the Cascaded Integrator-Comb (CIC) filter, and why it makes such a nice desampling filter for a high-rate data acquisition system. Input is 100MHz at 8 bits, and the output is any integer submultiple down to about 1kHz. The hardware resources in the FPGA are low: a set of 64-bit adders and registers, along with a reasonable amount of control logic.
The first version of the page is general description and overview. I plan to put more details of the math behind the CIC. In researching math and html, I found asciimathml.js . It's an open source JavaScript package that lets one embed equations into a webpage's text using simple LaTeX-like strings. I've used it internally and it's really nice to use. Should be live on the mhz100q page in the near future.

Friday, September 30, 2011

Embedded systems Conference

I was at the Embedded Systems Conference in Boston this week, and Vgo Communications had their telepresence robot roaming around on the exhibits floor. It was pretty unobtrusive, just wandering around the booths along with the rest of us.
I don't have any connection with them, just think it's a cute device.

Tuesday, May 17, 2011

Acer Laptop and Linux

My old Averatec laptop started producing read errors on the hard drive - not good! I didn't lose anything important thanks to backups. PATA drives seem to be pretty much unavailable these days, so I ended up getting a new Acer 5253-BZ602 laptop. The first part of the fun with any new laptop is getting Linux installed and getting the peripherals working. Had to go with the latest Debian unstable distribution in order to get a working LAN driver. Most of the pieces are working now (graphics, wireless, ethernet, camera, etc). A web page with current status and driver info is at .

Friday, March 11, 2011

USB inside an FPGA

I'm working on updating the MHZ100Q project, and for a low-cost USB interface I want to put all of the USB functions inside the FPGA. So externally the interface consists of a connector and 3 resistors - can't get much lower cost than that.
I found 3 open source USB implementations:
1) has the usb1_funct and usb_phy Verilog projects, which implement a USB device controller and physical layer (transceiver) respectively.
2) Joris has implemented the USB Communication Device Controller (CDC) protocol in VHDL. CDC devices basically look like an RS232 serial port to the host PC. This one is intended for use with an external PHY chip, and supports both full-speed(12MB/s) and high-speed(480MB/s) operation. Source is available on his website at .
3) Robert E. Jenkins of Johns Hopkins has published the USBF_IFC VHDL core, which includes both controller and PHY functions. It's set up for a XESS board, and is available at .


I ported all 3 to my custom PCB, and did a brief evaluation.
1) The opencores modules went together easily, and Linux sees the USB device. I didn't implement any data transfers to/from the USB device, but it looks easy to do.
2) I decided to use the Joris controller with the opencores soft PHY instead of an external chip. That limits me to full speed, but saves parts. After a bit of hacking around to get the signals and polarities right, the combination worked great. (Mixing VHDL and Verilog wasn't a problem). His test program gave about 10 megabytes/second transfer rates, which is just about the maximum possible rate for a full-speed device. I've posted my files to demo this combination on my website at (the specific file is 110310cdc_usb.tgz).
3) USBF_IFC took a bit of hacking to get it to run on my board. As stated on the project web page, it was a project for lab classes and still has some quirks.

I've been using USBF_IFC for several months now to test my hardware, but going forward I'm planning to use the Joris core. It's operation seems solid, being able to treat it as a serial device is nice for writing host software, and I can go to high speed if I add an external PHY in the future.

Monday, February 21, 2011


Followup to my previous post, related to Kaveh's comment. This post describes how I set up HDMI TX and RX.
To test HDMI TX and RX, I loaded the HDMI switch example from Xilinx App Note 495. Loaded Top-level files dvi_demo.v and dvi_demo.ucf into ISE WebPACK, along with all the lower-level modules they require. Everything is in from Xilinx.
Board configuration:
JP6&JP7 in: link SCL/SDA between TX&RX.
JP11 in: boot from USB stick.
JP5 in: Enable J1 HDMI input.
Connected J2 to display, J3 to source (J1 sometimes works as well).
I load dvi_demo.bit from a USB stick - takes about 30 seconds each time.
Tested with a Samsung TV and DirecTV box and Samsung BluRay.
The LED's show that RX is sync'ing with the signal and the display shows up on the TV. Tried several channels at different resolutions (no 1080p ones available). Sometimes had to unplug and replug the HDMI cables to get things to sync up. Just video, no audio passing through yet for some reason.
So that's my progress so far.

Wednesday, January 12, 2011

Atlys and HDMI on Linux

Xilinx App Note 495 describes sample implementations of DVI/HDMI receiver and transmitter on the Digilent Atlys board. I built the code using WebPACK 12.4, and it works as advertised: The colorbar test pattern displays nicely on my HDMI monitor.

Also installed Digilent's Linux version of their Adept tools for FPGA programming. They don't seem to have the full GUI version available, but the command-line tool was able to load my test code (as a WebPACK-generated .bit file) into the Atlys FPGA with no problem. Don't see any way to load code into the SPI flash: it appears that Windows-based tools are still needed for that.

Only one minor glitch: I use Debian, which isn't one of Digilent's supported distributions. In recent versions of Debian, the udev package doesn't allow plugin devices to have protection mode 0666, which means that the Digilent tools will only work if run as root.
The fix is to edit "/etc/udev/rules.d/52-digilent-usb.rules" and add a group:
SYSFS{idVendor}=="1443", MODE="666" GROUP="plugdev"
then any user in the "plugdev" group can run the Digilent tools. The /etc/group file should have a line like
where "jr" is my username.